[announce] Erlang ported to linksys nslu2

Richard A. O'Keefe ok@REDACTED
Wed May 18 04:50:42 CEST 2005

Mikael Pettersson <mikpe@REDACTED> wrote:
	 > Does anyone know what it takes to port HiPE to ARM?
	Easy, provide us with the HW :-) Seriously, any 32-bit CPU
	sensible enough to be able to run Linux and the gcc toolchain,
	and which is already running Erlang's BEAM interpreter, should
	be "supportable". I haven't studied the ARM ISA so I can't
	comment on whether generating native code would be easy or hard.
ARM chips support the "ARM" instruction set.
They may also support the "Thumb" instruction set, and/or the JVM.
ARM is basically a 32-bit RISC with 16 registers,
of which R15 is the PC, R14 is the return address, and R13 is SP.
Arithmetic and logical instructions are 3-operand and
may include a condition (instruction executed if condition true,
so no Bcc needed) and one source operand may include a shift.
Loads, stores, and branches are also conditional.
There's a condition code register with N, Z, C, V flags.
Depending on the model, there may be a Vector Floating Point coprocessor
providing IEEE arithmetic (on single numbers or short vectors).
The one thing it seems to be missing is an integer divide instruction
(the assembler manual has unsigned division as an example of a macro).

ARM instructions are 32 bits wide; Thumb instructions are mostly 16 bits
wide, and only let you access registers R0..R7 directly.  (Thumb2 is
more powerful.)  The point of Thumb is to save code space without
sacrificing performance.

I should think that ARM would be a pretty nice target for native compilation
of Erlang.

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