CPU/Hardware optimized for Erlang
Will Newton
will@REDACTED
Fri Jul 22 19:23:27 CEST 2005
On Friday 22 July 2005 13:25, Thomas Lindgren wrote:
> Even so, you will probably have to build an ASIC at
> best, while Intel puts 400 people to hand-optimizing
> the circuitry on the next x86 ... (they will thus
> likely have a big clock speed advantage too).
>
> (And why would the erlang chip have comparable
> performance at lower power?)
I'm currently working with a chip that has several hardware "threads". On a
single piece of code it's performance is not great, but when you have 2 or
more threads it's performance per watt can be quite impressive.
Also bear in mind that Intel chips are constrained very much by their legacy.
If you have a specific load (e.g. floating point, integer, I/O, DSP, highly
concurrent) it is not that difficult to build a chip that is faster than a
more general purpose processor.
At present it doesn't run Erlang however. :-)
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