[erlang-questions] Erlang arithmetics
Tue Nov 2 12:31:16 CET 2010
On Tuesday, November 02, Richard O'Keefe wrote:
> Current generation desktop chips are likely to have a single-cycle multiplier.
> These require lots of chip area, but then, current generation desktop chips
> *have* lots of chip area to spare. Low power devices are likely to use
> different methods
The development of low-power devices has been relentless. 32x32bit
single cycle multiplies (assuming "can issue one of those operations
every cycle" qualifies for "single cycle") multiplies are not uncommon
even in devices that draw less than 1W. Some actual, shipping devices:
* 600MHz TI DM6443 DSP, draws less than 1W, can issue _two_ 32x32 bit
multiplies every cycle. Variants go beyond 1GHz.
* 500MHz Au1000 CPU, draws about 500mW, does one 32x32bit multiply
every second cycle (and that chip is more than five years old)
* 1GHz ARM A8, not sure what it draws, probably < 1W, can issue one
32x32 multiply every cycle if I read the datasheet right.
I have no idea what Tilera does.
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