[erlang-questions] Executing Erlang on a FPGA (Re: How small could an Erlang emulator be?)

[Toby Thain]

On 16-Mar-07, at 10:29 PM, Roger Larsson wrote:

> On Thursday 15 March 2007 20:42, Toby Thain wrote:
>> On 15-Mar-07, at 3:02 PM, Vance Shipley wrote:
>>> I recall that someone made the suggestion on this list that
>>> the Crusoe processor, being softwaree definable, could be
>>> turned into an Erlang processor.  It's just software. :)
>>
>> Or soft CPU on FPGA.
>
> Yes, I have also thought about that.
> Would be an interesting project!
>
> [Lots of interesting research areas
>  - what "CPU" model to use:
> 	 JAM, beam, Icode[1], special purpose, extended general purpose[2]
>  - hardware assisted memory allocation
>  	+ write queue with single assignment optimizations and reference  
> counting?
>  - hardware assisted garbage collection
>  - hardware assisted operating systems
> 	see http://www.xilinx.com/publications/magazines/emb_02/xc_pdf/ 
> emb02_all.pdf
> 	and/or "Programmerbara kretsar" ISBN 91-44-03713-9
> 	Sierra has been sold to Prevas - see
> http://www.prevas.com/productdevelopment/products/prevassierra. 
> 4.7ebfd4a210f9150c2bd80002274.html
>  - hardware assisted serialization (for communicating with the host  
> CPU)
>  - hardware assisted message sending (scatter gather DMA but data  
> itself
> contains the links)
>  - ...
> ]
> Who does this already?

The Transputer had hardware process timeslicing, blocking and message  
passing... Has anyone considered what kind of fit Erlang would be to  
its architecture?

There is a Transputer-inspired CPU being worked on by John Jakson:
http://groups.google.com/group/comp.sys.transputer/browse_thread/ 
thread/34e00d345d19f817/
http://groups.google.com/group/comp.sys.transputer/msg/ab95a8d60c71f139

He also wrote a nice introduction to the Transputer concept:
http://mailgate.dada.net/comp/comp.sys.transputer/msg00330.html

--Toby

>
>
> /RogerL
...