CPU/Hardware optimized for Erlang
Mon Jul 25 11:20:24 CEST 2005
--- Will Newton <> wrote:
> Also bear in mind that Intel chips are constrained
> very much by their legacy.
I don't think this is a big handicap. Yes, it leads to
extra complexity, but high-performance hardware
already is very complex (as I'm sure you know). The
instruction set or legacy features of IA32 really
doesn't seem to be the bottleneck when you look at the
> If you have a specific load (e.g. floating point,
> integer, I/O, DSP, highly
> concurrent) it is not that difficult to build a chip
> that is faster than a
> more general purpose processor.
I agree -- my recommendation thus remains: optimize
the hardware for the application, not the language :-)
In the case of Erlang-in-telecoms, perhaps the APZ
processor could be a fine source of inspiration (it's
certainly a very successful product line).
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