[erlang-questions] BEAM in hardware

[Lloyd R. Prentice]

Hi All,

Some 30-odd years ago Chuck Moore, developer of Forth, turned his attention to chip design. He wrote his own chip-design CAD system in Forth and, subsequently designed and brought to silicon an impressive list of successful chips:

https://en.m.wikipedia.org/wiki/Charles_H._Moore

Chuck’s latest inspirations can be seen here:

http://www.greenarraychips.com/

The key to Chuck’s genius:  Pare the problem-at-hand down to it’s essence; seek starkest simplicity. This has kept him out of step with the computing mainstream throughout this career.

Best wishes,

LRP

Sent from my iPad

> On Sep 2, 2018, at 6:17 AM, Mikael Pettersson <mikpelinux@REDACTED> wrote:
> 
>> On Sat, Sep 1, 2018 at 10:33 PM, joe mcguckin <joe@REDACTED> wrote:
>> Does anyone know if the BEAM vm has ever been implemented directly in hardware (e.g. in an FPGA)?
> 
> Not the BEAM that I know of, but Ericsson has had at least one project
> to implement an "Erlang processor" (via different presumably simpler
> VMs).
> 
> Apart from the usual problems of synthesizing a processor, you also
> have to consider:
> - there's a lot of implicit state and semantics in the BEAM
> instructions, so you'd have to duplicate things like processes,
> dynamic memory allocation, garbage collection, exception handling,
> message passing, process links, etc
> - the BIFs, without which you can't do much, at a minimum you'd need
> networking support
> 
> Microcoded HW implementations of LISP and Smalltalk were popular in
> the 70s and early 80s, but were quickly replaced by SW running on
> RISCs with higher performance, lower cost, and quicker updates.
> 
> I'm not sure for what use case a HW Erlang makes sense (except as an
> intellectual exercise).
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