Make replacement for Erlang - suggestions?
Wed Sep 18 16:47:14 CEST 2002
Matthias Lang <matthias@REDACTED> writes:
> - I can't find any advice on the WWW for "how do I actually make
> this work"
A program called "Idel" makes a very nice example, I
One nice trick is defining some variables in the top level, like
TESTS, EXAMPLES, OBJECTS, etc, with user-visible targets like "test"
depending on them. The included sub-makefiles define all their own
rules, and then "+=" their targets onto those top-level variables to
"hook into" the user-visible make targets.
> An example: in the source tree for one of our products, there are at
> least three different ways to turn a .c file into a .o file, depending
> on whether the object code is meant to run on the target board's CPU,
> the DSP or on the build system.
> I currently deal with this by keeping code intended for different
> compilers in different directories. In one Makefile I might have
> %.o: %.c
> $(CC) $(CFLAGS) -c $<
> while in another I might have
> %.o: %.c
> $(PPC_CC) $(PPC_CFLAGS) -c $<
> I can't think of a sensible way to do this in a combined makefile,
> with or without include files. Maybe I've missed something obvious.
$(PPC_CC) $(PPC_CFLAGS) -c $<
$(DSP_CC) $(DSP_CFLAGS) -c $<
(Maybe a GNU-ism, not sure.)
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