[erlang-questions] BEAM in hardware

Miles Fidelman mfidelman@REDACTED
Sat Sep 1 23:43:30 CEST 2018



On 9/1/18 5:06 PM, Dmytro Lytovchenko wrote:
> There is no known hardware implementation because the original BEAM 
> 158-instruction set is quite complex to load, parse and interpret, and 
> the runtime part of hardware to support built-ins and data types would 
> be pretty massive. But it might be possible if you simplify the opcode 
> set, simplify the memory structure (to save on bit manipulations) 
> similar to Python or Java memory model, and shrink it to something 
> that is possible to hard-wire.

Is it really any more complex than, implementing a CISC processor, or 
something funky like a GPU or the old BBN Butterfly?  For that matter, 
the old DG Nova had a pretty funky instruction set - looked a lot more 
like microcode than a traditional ISA.

What about if you allow for microcode?  I remember working on microcode 
to extend a MIL-STD-1750 processor, to do pulse train manipulation, for 
electronic warfare applications (back in the day when 4mips was blinding 
fast).  Or what about the LISP machines?

It doesn't seem out of the range of possibility - given a sufficiently 
resourced team.  Now whether it makes economic sense, is a separate 
question.

Miles Fidelman


-- 
In theory, there is no difference between theory and practice.
In practice, there is.  .... Yogi Berra




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