Mac Intel

Joel Reymont <>
Tue Aug 15 02:47:37 CEST 2006


On Aug 14, 2006, at 5:51 PM, David Hopwood wrote:

> If there are ways to generate an SSE2 exception that don't set the
> ip, cs, and opcode fields, then these fields are inherently unreliable
> for the purpose they're being used for here (to skip over whatever
> caused the exception).

Mea culpa! Mea maxima culpa! /Sounds of flogging/

I'm an idiot but at least I know more about assembler and the IA32  
architecture than I new last week :-). Anyway, the instruction  
pointer on Mac Intel resides in mc->ss.eip and it's being properly  
set. My test program outputs:

eip = 1e0c, cs = 27

gdb dissassemble of do_fmul (res = a * b) shows:

0x00001e0c <do_fmul+31>:        mulsd  %xmm1,%xmm0

so everything is fair and square. Now, I just have to update the code  
that skips over SSE2 instructions and I'll be good!

--
http://wagerlabs.com/








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