Mac Intel

Joel Reymont joelr1@REDACTED
Mon Aug 14 15:59:01 CEST 2006

On Aug 14, 2006, at 2:23 PM, Daniel Luna wrote:

> Line 1391-1392:
>    x86 ->
>       [x87 | Common]; %% XXX: Temporary until x86 has sse2

I will look at this a little later, once I can recover from SSE2  

> 2. One needs to change the exception stack handling, which is kind  
> of easy, except that the gcc-headers didn't have the SSE2 fields  
> when I looked at it the last time. Either one hard codes the  
> offsets by hand, or hopes that gcc have changed the header stuff.  
> Easy, but I was lazy. (This has a lot to do with exception stack  
> handling, and I have no idea how it looks like for the Intel Mac)

Can you elaborate on this? What headers do you need and what do you  
need from the headers?

> 3. Change skip_sse2_insn in erts/emulator/sys/unix/sys_float.c to  
> handle 32 bit instructions instead of 64 bit instructions. In  
> particular, the meanings of 0x40 and 0x41 have changed, and maybe  
> some other instruction codes that I don't remember right now.

I'm finding this very hard to deal with, as you can see tfrom my  
prior messages. Basically, the SSE2 exception is triggered by the fpe- 
test program (with proper SSE2 unmasking). The FPU instruction  
pointer is 0, though, so there's nothing to skip over.

If I modify the fpe-test program to use atof when multiplying then  
the FPU IP is non-zero but the instruction pointed to does not seem  
to be a SSE2 instruction (fstpl).

I'm currently reading the Intel manuals to see how to recover from  
SSE exceptions. Where can I find more information on the "must skip  
over SSE2 instructions on x86-64" issue.

> 4. The tricky part! Find some way to detect (at runtime, or at  
> least load time) that the machine doesn't handle SSE2 and fallback  
> to BEAM. Easy, but probably more expensive than the potential gain.

This is possible, actually, and described in the Intel manuals. I'm  
not concerned with this, though, as it's handled for 64-bit Linux  
systems and Apple Intel hardware has SSE2.

> Joel: I hope that helped.

Yes, thanks. I didn't know I had to edit hipe.erl as well. Overall,  
this has turned out to be a full-blown hacking session and although I  
learn fast I would appreciate more fast feedback from you guys. Just  
like your email that I'm replying to ;-).

My current outstanding questions:

Why trap floating-point exceptions?

How did you determined that SSE2 instructions need to be skipped on  
x86-64? Is this written somewhere?

> How about fixing sse2 for Linux x86 while you are at it?

I don't have Linux installed on the MacBook and I'm chomping at the  
bit to finish HiPE and move on to other things like Cocoa bindings,  
commercial Mac IDE and my trading software ;-).

I'll see what I can do as the difference does not seem to be  
significant. The machine context structure is different (mc->gregs 
[REG_RIP] vs mc->fs.fpu_ip) but all the information is there.

	Thanks, Joel


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