Mac Intel

Joel Reymont <>
Sun Aug 13 23:45:09 CEST 2006


Well, I'm a bit stuck at the moment.

The FPU state on Mac OSX Intel has the following fields in it:

	fp_control_t	fpu_fcw;			/* x87 FPU control word */
	fp_status_t		fpu_fsw;			/* x87 FPU status word */
	uint8_t			fpu_ftw;			/* x87 FPU tag word */
	uint8_t			fpu_rsrv1;			/* reserved */
	uint16_t		fpu_fop;			/* x87 FPU Opcode */
	uint32_t		fpu_ip;				/* x87 FPU Instruction Pointer offset */
	uint16_t		fpu_cs;				/* x87 FPU Instruction Pointer Selector */
	uint16_t		fpu_rsrv2;			/* reserved */
	uint32_t		fpu_dp;				/* x87 FPU Instruction Operand(Data) Pointer  
offset */
	uint16_t		fpu_ds;				/* x87 FPU Instruction Operand(Data) Pointer  
Selector */
	uint16_t		fpu_rsrv3;			/* reserved */
	uint32_t		fpu_mxcsr;			/* MXCSR Register state */
	uint32_t		fpu_mxcsrmask;		/* MXCSR mask */

In fpe_sig_action I'm clearing the state like this:

     *((unsigned short *)&mc->fs.fpu_fsw) &= ~0xFF;

The overflow exception is clearly a SSE2 one since I had to unmask  
SSE2 exceptions to catch it. My test code never exits so clearly the  
"SSE2 exceptions leave the pointer at the failed instruction" issue.  
It also seems that fpu_ip would correspond to mc->gregs[REG_RIP] on  
Linux.

The check "if (mc->fs.fpu_mxcsr & 0x000F) {" passes so I need to skip  
the SSE2 instruction.

Problem is that both fpu_fop and fpu_ip are 0 in the exception  
handler. I'll see what I can do with assembler.

	Thanks, Joel

--
http://wagerlabs.com/








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